深圳市匯芯誠電子科技有限公司
主營產(chǎn)品: 汽車電子, 家用電器, 醫(yī)療電子, 通訊網(wǎng)絡(luò)
供應(yīng)TI-74系列邏輯芯片-SN74HC164N
價格
訂貨量(個)
¥0.70
≥5
店鋪主推品 熱銷潛力款
祺祴祵祵祸祻祲祴祻祶祺
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深圳市匯芯誠電子科技有限公司
店齡6年 企業(yè)認證
聯(lián)系人
馬先生
聯(lián)系電話
祺祴祵祵祸祻祲祴祻祶祺
所在地區(qū)
廣東省深圳市
主營產(chǎn)品
供應(yīng)TI 74系列邏輯芯片/SN74HC164N
邏輯類型:移位寄存器
輸出類型:推挽式
元件數(shù):1
每元件位數(shù):8
功能:串行至并行
電壓 - 電源:2 V ~ 6 V
工作溫度:-40°C ~ 125°C
安裝類型:通孔
封裝/外殼:14-DIP(0.300",7.62mm)
供應(yīng)商器件封裝:14-PDIP
1 Features 3 Description
These 8-bit shift registers feature AND-gated serial
1• Wide Operating Voltage Range of 2 V to 6 V
inputs and an asynchronous clear (CLR) input. The
• Outputs Can Drive Up to 10 LSTTL Loads gated serial (A and B) inputs permit complete control
• Low Power Consumption, 80-μA Maximum ICC over incoming data; a low at either input inhibits entry
• Typical tpd = 20 ns of the new data and resets the first flip-flop to the low
level at the next clock (CLK) pulse. A high-level input
• ±4-mA Output Drive at 5 V
enables the other input, which then determines the
• Low Input Current of 1-μA Maximum state of the first flip-flop. Data at the serial inputs can
• AND-Gated (Enable/Disable) Serial Inputs be changed while CLK is high or low, provided the
minimum set-up time requirements are met. Clocking • Fully Buffered Clock and Serial Inputs
occurs on the low-to-high-level transition of CLK.
• Direct Clear
Noted. On All Other Products, Production SOIC (14) 8.65 mm × 3.91 mm
Processing Does Not Necessarily Include Testing PDIP (14) 19.30 mm × 6.35 mm
of All Parameters. SN74HC164
SO (14) 10.30 mm × 5.30 mm
TSSOP (14) 5.00 mm × 4.40 mm 2 Applications
CDIP (14) 19.94 mm × 6.92 mm
• Programable Logic Controllers SN54HC164 CFP (14) 9.21 mm × 6.29 mm
• Appliances LCCC (14) 9.39 mm × 9.39 mm