RTL8762AJ-CG 藍(lán)牙芯片 RTL8762AJ-CG 原裝 RTL8762AJ-CG 現(xiàn)貨

The RTL8762AG/RTL8762AR/RTL8762AJ/RTL8762AK (hereafter referred to as the RTL8762A) are

ultra-low-power system on-chip solutions for Bluetooth low energy applications that combines the

excellent performance of a leading RF transceiver with a low-power ARM® CortexTM-M0, 256KB eFlash,

80KB RAM, and rich powerful supporting features and peripherals.

The embedded ARM® CortexTM-M0 32-bit CPU features a 16-bit instruction set with 32-bit extensions

(Thumb-2® technology) that delivers high-density code with a small memory footprint. By using a

single-cycle 32-bit multiplier, a 3-stage pipeline, and a Nested Vector Interrupt Controller (NVIC), the

ARM® CortexTM-M0 CPU makes program execution simple and highly efficient.

In the RTL8762A, we support the Serial Wire Debug (SWD) interface provided as part of the Debug

Access Port (DAP), in conjunction with the Basic Branch Buffer (BBB). This offers a flexible and powerful

mechanism for non-intrusive program code debugging. Users can easily add breakpoints in the code and

perform single-step debugging.

The RTL8762A memory architecture (see Figure 1, page 2) includes 80KB of data RAM that can be

divided into three portions, e.g., 16KB for buffer RAM, 24KB for on-RAM, and 40KB for off-RAM.

Specifically, the available memory for APPs includes 9KB in on-RAM and 18KB in off-RAM. Each

on-RAM and off-RAM can be divided into static and dynamic areas. The area size can be adjusted via

eFUSE.

The on-RAM can maintain data when the system is in Deep Low Power State (DLPS) mode (Data in

off-RAM is lost when the system enters DLPS mode). The static area refers to the global variables in the

program. The dynamic area refers to the direct or indirect call of the OS’s pvPortMalloc allocated space,

such as xQueueCreate, xTaskCreate, etc.